03 April 2020


Fast clique minor generation in Chimera qubit connectivity graphs (1)
Authors: Kelly Boothby, Andrew D. King, Aidan Roy (Submitted on 16 Jul 2015 (v1), last revised 1 Apr 2020 (this version, v2)) Abstract: The current generation of D-Wave quantum annealing processor is designed to minimize the energy of an Ising spin configuration whose pairwise interactions lie on the edges of a {\em Chimera} graph $\mathcal C_{M,N,L}$.
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